Twin Butterfly High Throughput Parallel Architecture FFT Algorithm
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[1] Marshall C. Pease,et al. Organization of Large Scale Fourier Processors , 1969, J. ACM.
[2] J. Tukey,et al. An algorithm for the machine calculation of complex Fourier series , 1965 .
[3] Yutai Ma,et al. An effective memory addressing scheme for FFT processors , 1999, IEEE Trans. Signal Process..
[4] C. K. Yuen,et al. Theory and Application of Digital Signal Processing , 1978, IEEE Transactions on Systems, Man, and Cybernetics.
[5] Earl E. Swartzlander,et al. A pipelined architecture for the multidimensional DFT , 2001, IEEE Trans. Signal Process..
[6] Yu Feng. VLSI Architecture of a High Performance FFT Processor , 2003 .
[7] D. Cohen. Simplified control of FFT hardware , 1976 .
[8] Xie Ying. Dedicated Memory Accessing for Radix2×2 FFT , 2000 .
[9] T. Bially,et al. Parallelism in fast Fourier transform hardware , 1973 .