Halo and the Anatomy of the FPS

A simplified digital NRZ data phase detector is provided with a minimum number of components and with an expanded measuring interval to enable the use of slower speed components. In a phase locked loop application, a first input gate, such as a flip-flop, responds to NRZ data, and a second input gate responds to clock pulses and the output of the first gate. Variable and fixed width correction signals are derived directly from the outputs of the first and second gates, respectively, within a measuring interval initiated by a data transition and terminated by a clock transition. The difference in duration between the directly derived variable and fixed pulses provides phase indication.