Methodology to qualify silicon carbide MOSFETs for single shot avalanche events

This paper presents a methodology to establish and qualify safe bounds of operation for Silicon Carbide power devices under avalanche stress. The methodology involves using a statistical method to estimate an avalanche safe operating area, and by ensuring that device reliability is not degraded after avalanche stress. We also demonstrate the avalanche capability of the C3M 900V SiC MOSFETs, which have been fully qualified for avalanche ruggedness by employing this methodology.