Generic approach for hardening state machines against strong adversaries

Most of the countermeasures against active fault injection attacks focus on securing the datapath of the cryptographic circuits. However, control unit security thus far has been neglected except for a few scattered references and there is not much work done to secure finite state machines (FSMs) against advanced attackers. In this study, the authors propose a novel methodology to remove the vulnerability of control units against active fault attacks. As an initial step, the authors describe an observation which states that because of the non-uniform behaviour of the FSM variables (i.e. state registers, inputs etc.), a direct implementation of non-linear codes for FSM security will not work. Hence, securing FSMs using non-linear codes is an important and difficult problem that requires additional effort. The authors' solution to this problem is built around two ideas. The authors first provide an arithmetic state machine construction for which the robustness of the applied non-linear error detection scheme can be easily measured. This formulation also dramatically simplifies the predictor design. Next, the authors use randomised embedding to achieve unpredictability and uniformity. This two-pronged technique provides a generic solution applicable to any FSM. Consequently, the resulting FSMs will be robust even against very advanced attackers.

[1]  Paul C. Kocher,et al.  Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems , 1996, CRYPTO.

[2]  Richard J. Lipton,et al.  On the Importance of Checking Cryptographic Protocols for Faults (Extended Abstract) , 1997, EUROCRYPT.

[3]  Paul C. Kocher,et al.  Differential Power Analysis , 1999, CRYPTO.

[4]  Edward J. McCluskey,et al.  Which concurrent error detection scheme to choose ? , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

[5]  Ramesh Karri,et al.  Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  George S. Taylor,et al.  Improving smart card security using self-timed circuits , 2002, Proceedings Eighth International Symposium on Asynchronous Circuits and Systems.

[7]  Ross J. Anderson,et al.  Optical Fault Induction Attacks , 2002, CHES.

[8]  Israel Koren,et al.  Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard , 2003, IEEE Trans. Computers.

[9]  Mark G. Karpovsky,et al.  New class of nonlinear systematic error detecting codes , 2004, IEEE Transactions on Information Theory.

[10]  Andrzej Krasniewski Concurrent error detection in sequential circuits implemented using FPGAs with embedded memory blocks , 2004, Proceedings. 10th IEEE International On-Line Testing Symposium.

[11]  Mark G. Karpovsky,et al.  Robust protection against fault-injection attacks on smart cards implementing the advanced encryption standard , 2004, International Conference on Dependable Systems and Networks, 2004.

[12]  Mark G. Karpovsky,et al.  Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard , 2004, CARDIS.

[13]  Robust Codes for Fault Attack Resistant Cryptographic Hardware , 2005 .

[14]  David Naccache,et al.  Finding Faults , 2005, IEEE Secur. Priv..

[15]  I. Koren,et al.  Fault Diagnosis and Tolerance in Cryptography , 2006 .

[16]  David Naccache,et al.  The Sorcerer's Apprentice Guide to Fault Attacks , 2006, Proceedings of the IEEE.

[17]  Mark G. Karpovsky,et al.  Fault Attack Resistant Cryptographic Hardware with Uniform Error Detection , 2006, FDTC.

[18]  Berk Sunar,et al.  Robust Finite Field Arithmetic for Fault-Tolerant Public-Key Cryptography , 2006, FDTC.

[19]  Michael Hutter,et al.  Optical and EM Fault-Attacks on CRT-based RSA : Concrete Results , 2007 .

[20]  Régis Leveugle,et al.  Evaluation of Register-Level Protection Techniques for the Advanced Encryption Standard by Multi-Level Fault Injections , 2007, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007).

[21]  Mark G. Karpovsky,et al.  Comparative Analysis of Robust Fault Attack Resistant Architectures for Public and Private Cryptosystems , 2008, 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography.

[22]  Mark G. Karpovsky,et al.  Asynchronous balanced gates tolerant to interconnect variability , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[23]  Berk Sunar,et al.  Novel PUF-Based Error Detection Methods in Finite State Machines , 2009, ICISC.

[24]  Berk Sunar,et al.  Sequential Circuit Design for Embedded Cryptographic Applications Resilient to Adversarial Faults , 2008, IEEE Transactions on Computers.

[25]  Régis Leveugle,et al.  Double-Data-Rate Computation as a Countermeasure against Fault Analysis , 2008, IEEE Transactions on Computers.

[26]  Berk Sunar,et al.  Non-linear Error Detection for Finite State Machines , 2009, WISA.