Simulation Algorithms With Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks

We design an algorithmic framework using matrix exponentials for time-domain simulation of power delivery network (PDN). Our framework can reuse factorized matrices to simulate the large-scale linear PDN system with variable stepsizes. In contrast, current conventional PDN simulation solvers have to use fixed step-size approach in order to reuse factorized matrices generated by the expensive matrix decomposition. Based on the proposed exponential integration framework, we design a PDN solver R-MATEX with the flexible time-stepping capability. The key operation of matrix exponential and vector product is computed by the rational Krylov subspace method. To further improve the runtime, we also propose a distributed computing framework DR-MATEX. DR-MATEX reduces Krylov subspace generations caused by frequent breakpoints from a large number of current sources during simulation. By virtue of the superposition property of linear system and scaling invariance property of Krylov subspace, DR-MATEX can divide the whole simulation task into subtasks based on the alignments of breakpoints among those sources. The subtasks are processed in parallel at different computing nodes without any communication during the computation of transient simulation. The final result is obtained by summing up the partial results among all the computing nodes after they finish the assigned subtasks. Therefore, our computation model belongs to the category known as embarrassingly parallel model. Experimental results show R-MATEX and DR-MATEX can achieve up to around 14.4× and 98.0× runtime speedups over traditional trapezoidal integration-based solver with fixed time-step approach.

[1]  Chung-Kuan Cheng,et al.  ePlace-MS: Electrostatics-Based Placement for Mixed-Size Circuits , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Marlis Hochbruck,et al.  Exponential Integrators for Large Systems of Differential Equations , 1998, SIAM J. Sci. Comput..

[3]  Zhi Liu,et al.  RWCap: A Floating Random Walk Solver for 3-D Capacitance Extraction of Very-Large-Scale Integration Interconnects , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Chung-Kuan Cheng,et al.  MATEX: A distributed framework for transient simulation of power distribution networks , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[5]  Rajendran Panda,et al.  Hierarchical analysis of power distribution networks , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  M. Hochbruck,et al.  Exponential integrators , 2010, Acta Numerica.

[7]  Yi Pan,et al.  Practical Deadlock-Free Fault-Tolerant Routing in Meshes Based on the Planar Network Fault Model , 2009, IEEE Transactions on Computers.

[8]  Peng Li,et al.  Parallel Circuit Simulation: A Historical Perspective and Recent Developments , 2012, Found. Trends Electron. Des. Autom..

[9]  Zhiyu Zeng,et al.  Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation , 2010, Design Automation Conference.

[10]  Jia Wang,et al.  Secure Power Grid Simulation on Cloud , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  Jia Wang,et al.  Scalable power grid transient analysis via MOR-assisted time-domain simulations , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[12]  Sung Kyu Lim,et al.  Full chip impact study of power delivery network designs in monolithic 3D ICs , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[13]  Rajendran Panda,et al.  Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding , 2008, 9th International Symposium on Quality Electronic Design (isqed 2008).

[14]  Chris C. N. Chu,et al.  An efficient and effective detailed placement algorithm , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[15]  Chung-Kuan Cheng,et al.  Power grid simulation using matrix exponential method with rational Krylov subspaces , 2013, 2013 IEEE 10th International Conference on ASIC.

[16]  Meeta Sharma Gupta,et al.  Understanding Voltage Variations in Chip Multiprocessors using a Distributed Power-Delivery Network , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[17]  Zhi Liu,et al.  Fast floating random walk algorithm formulti-dielectric capacitance extraction with numerical characterization of Green's functions , 2012, 17th Asia and South Pacific Design Automation Conference.

[18]  Andrew T. Yang,et al.  Full-chip vectorless dynamic power integrity analysis and verification against 100uV/100ps-resolution measurement , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

[19]  Sani R. Nassif,et al.  2011 TAU power grid simulation contest: Benchmark suite and results , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[20]  Houle Gan,et al.  Early-stage power grid design: Extraction, modeling and optimization , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[21]  Ieee Circuits,et al.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[22]  Farid N. Najm,et al.  A static pattern-independent technique for power grid voltage integrity verification , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[23]  Zuochang Ye,et al.  Sparse Implicit Projection (SIP) for reduction of general many-terminal networks , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

[24]  Sani R. Nassif,et al.  2012 TAU power grid simulation contest: Benchmark suite and results , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[25]  Cheng Zhuo,et al.  A silicon-validated methodology for power delivery modeling and simulation , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[26]  Quan Chen,et al.  Time-Domain Analysis of Large-Scale Circuits by Matrix Exponential Method With Adaptive Control , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[27]  Chung-Kuan Cheng,et al.  Dynamic analysis of power delivery network with nonlinear components using matrix exponential method , 2015, 2015 IEEE Symposium on Electromagnetic Compatibility and Signal Integrity.

[28]  Yu Wang,et al.  NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[29]  Quan Chen,et al.  Circuit simulation via matrix exponential method for stiffness handling and parallel processing , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[30]  Sheldon X.-D. Tan,et al.  Parallel power grid analysis using preconditioned GMRES solver on CPU-GPU platforms , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[31]  Y. Saad.  Analysis of some Krylov subspace approximations to the matrix exponential operator , 1992 .

[32]  Chung-Kuan Cheng,et al.  ePlace: Electrostatics based placement using Nesterov's method , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[33]  Wei Huang,et al.  Some Limits of Power Delivery in the Multicore Era , 2012 .

[34]  Sanjay Ghemawat,et al.  MapReduce: Simplified Data Processing on Large Clusters , 2004, OSDI.

[35]  Randy H. Katz,et al.  Mesos: A Platform for Fine-Grained Resource Sharing in the Data Center , 2011, NSDI.

[36]  Wenjian Yu,et al.  An algorithmic framework for efficient large-scale circuit simulation using exponential integrators , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[37]  M. Botchev.  A short guide to exponential Krylov subspace time integration for Maxwell's equations , 2012 .

[38]  Randy H. Katz,et al.  A view of cloud computing , 2010, CACM.

[39]  Andrew B. Kahng,et al.  High-performance gate sizing with a signoff timer , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[40]  James Hardy Wilkinson,et al.  Kronecker''s canonical form and the QZ algorithm , 1979 .

[41]  Zhuo Feng,et al.  Multigrid on GPU: Tackling Power Grid Analysis on parallel SIMT platforms , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

[42]  Tao Huang,et al.  Local clock skew minimization using blockage-aware mixed tree-mesh clock network , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[43]  Kevin Skadron,et al.  Walking pads: Fast power-supply pad-placement optimization , 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

[44]  Ting Yu,et al.  PGT_SOLVER: An efficient solver for power grid transient analysis , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[45]  Sani R. Nassif,et al.  Fast power grid simulation , 2000, Proceedings 37th Design Automation Conference.

[46]  Quan Chen,et al.  A Practical Regularization Technique for Modified Nodal Analysis in Large-Scale Time-Domain Circuit Simulation , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[47]  Wenjian Yu,et al.  Efficient Space Management Techniques for Large-Scale Interconnect Capacitance Extraction With Floating Random Walks , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[48]  Shen Lin,et al.  Challenges in power-ground integrity , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[49]  Yici Cai,et al.  PowerRush : Efficient transient simulation for power grid analysis , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[50]  Qing He,et al.  Parallel power grid analysis using distributed direct linear solver , 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

[51]  Chung-Kuan Cheng,et al.  Performance-driven placement for design of rotation and right arithmetic shifters in monolithic 3D ICs , 2013, 2013 International Conference on Communications, Circuits and Systems (ICCCAS).

[52]  Marlis Hochbruck,et al.  Preconditioning Lanczos Approximations to the Matrix Exponential , 2005, SIAM J. Sci. Comput..

[53]  M.L. Liou,et al.  Computer-aided analysis of electronic circuits: Algorithms and computational techniques , 1977, Proceedings of the IEEE.

[54]  Yanheng Zhang,et al.  GDRouter: Interleaved global routing and detailed routing for ultimate routability , 2012, DAC Design Automation Conference 2012.

[55]  Yousef Saad,et al.  Iterative methods for sparse linear systems , 2003 .

[56]  Dong Xiang,et al.  A thermal-driven test application scheme for pre-bond and post-bond scan testing of three-dimensional ICs , 2014, JETC.

[57]  Martin J. Gander,et al.  PARAEXP: A Parallel Integrator for Linear Initial-Value Problems , 2013, SIAM J. Sci. Comput..

[58]  Sani R. Nassif,et al.  Power grid analysis benchmarks , 2008, 2008 Asia and South Pacific Design Automation Conference.

[59]  Jia Wang,et al.  Parallel forward and back substitution for efficient power grid simulation , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[60]  Kevin Skadron,et al.  Architecture implications of pads as a scarce resource , 2014, 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA).

[61]  Scott Shenker,et al.  Spark: Cluster Computing with Working Sets , 2010, HotCloud.