A CMOS smart temperature sensor with a 3σ inaccuracy of ±0.1°C from -55°C to 125°C

A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 μm CMOS process. Substrate pnp transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the pnp transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within ±0.5 °C (3σ) from -50 °C to 120 °C.

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