Design of High-Speed Image Transmission Board Based on PCI-Express
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This paper designs and implements a high speed image transmission board of external DDR3 SDRAM based on PCI-Express to meet the requirement of high frame rate in high speed image data transmission system. Transmission board uses XILINX Kintex7 series chip XC7K70T as the master chip, through the PCI-Express DMA logic for data exchange with the host computer, and uses external DDR3 cache to solve the problems of high frame rate and real-time in large amount of data transmission. Transmission board uses LVDS high-speed differential interface as an external interface with the design of a set of LVDS interface timing. In the experiment, the gray scale visible image with 1024*1025 byte size is transmitted and tested. It can verify the transmission rate of 50 frames per second respectively, and the data transmission is stable and reliable, which can provide some reference value for high speed data transmission system. Introduction In recent years, with the rapid development of electronic technology, image information processor has been widely used in aerospace, military, medical and other fields. At the same time, the corresponding image transmission system has also been widely used and developed by leaps and bounds. As an important component of the image information processing evaluation test system, the image transmission rate, accuracy and stability of the image information processor have a significant impact on the assessment results. With the emergence of high-resolution visible light images, a complete set of image transmission system to send high-resolution images at the same time, but also to meet the requirements of high frame rate. This paper designs a high-speed image transmission board based on PCI-Express. The board adopts LVDS interface as the system external interface, and realizes the high-speed transmission of image sequence in real time to complete the simulation test of image demand equipment. As the characteristics of large amount of data and high rate in image transmission, the board chooses PCI-E bus as the interface of PC, which is not only simple, but also has the ten times transmission speed of the PCI bus[1]. In the image sending system, if there is no external memory, its internal storage space is not enough to store one frame image, and the FIFO packet transmission method will increase the transmission time of the image on the link and cannot solve the problem of frame rate and real-time. To solve the above problem, DDR3 is used as an image buffer, which stored the transmission of the image first, and then read out to transmit of each frame. System Design The image transmission board designed in this paper mainly includes sections of LVDS interface, PCI-E bus, external DDR3 memory and the core logic design of FPGA. The section of LVDS interface is composed of the isolation chip, LVDS transmitter chip MAX9247 and related circuits, 1277 5th International Conference on Frontiers of Manufacturing Science and Measuring Technology (FMSMT 2017) Advances in Engineering Research (AER), volume 130
[1] Li Huan,et al. FPGA Based DDR3 Applications in a Multichannel Channelization Data Cache , 2016 .