Efficient Hardware Architecture for Large Disparity Range Stereo Matching Based on Belief Propagation

This paper introduces an efficient hardware architecture for the belief propagation(BP) algorithm especially for large disparity range stereo matching applications. BP is a popular global optimization algorithm for labelling problems which is hardware friendly. There are few types of research focus on BP implementation in large disparity range stereo matching problem since traditional belief propagation hardware implementations suffer from a server trade-off between hardware efficiency and short critical path while the disparity range is larger than 64. In this paper, we eliminate the redundancy of previous BP implementation and propose an efficient architecture without introducing any delay overhead which is more suitable for large disparity range cases. As a result, the hardware complexity is reduced from O(L2) to O(Llog2 L), where L is the disparity range. We use a time-area term to demonstrate the trade-off between various architectures, results show that the proposed one can reach 49:6% and 71:2% reduction compared to the state-of-the-art implementation with disparity ranges 64 and 128 respectively.