2-level LFSR scheme with asynchronous test pattern transfer for low cost and high efficiency build-in-self-test

This paper describes a new test pattern generator to increase fault coverage and a test pattern transferring method to re duce test time without large hardware overhead in the BIST structure The new pattern generator uses a level LFSR scheme in which inputs are varied and controlled by the counter output An asynchronous internal clock generated by an internal ring oscillator is used for fast test pattern transfer into the scan chain The new level LFSR scheme is veri ed by the HITEC fault simulator

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