A survey of high performance analog-to-digital converters for defense space applications

The state of analog-to-digital converters (ADCs) is surveyed and summarized for 150 ADCs simultaneously possessing sample rates greater than or equal to one Megasample/second (2 1 Msps), and bit resolutions greater than or equal to twelve bits (2 12-bits). These performance metrics are commonly specified for defense space applications. Converter performance results are presented with respect to bit resolution, sample rate, power dissipation, and spurious-free dynamic range (SFDR). A performance comparison is made between ADCs produced fiom commercial versus research and development (R&D) sources. The state of semiconductor process technology for M C s is summarized in terms of power supply voltage, substrate technology, and minimum process geometry. Results showed no fundamental limitation in powedspeed performance in high performance pipeline ADCs as CMOS processes are scaled into deep submicron (0.25 pm) geometries, and analog voltage supplies are scaled down to 3.0 V. The pipeline architecture is demonstrated as pervasive within this performance specification range. Results demonstrate commercially available ADCs generally do not meet basic performance specifications or radiation hardness requirements for defense space missions. Recommendations are presented for development of ADCs in scaled, silicon-based process technologies such as SiGe BiCMOS coupled with hardened by design techniques. The survey serves as a tool for assessing the current state of ADC development and for determining future target goals for M C performance. TABLE OF CONTENTS

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