An efficient and scalable hardware architecture for singular value decomposition towards massive MIMO communications

Massive multiple input multiple output (MIMO) technology plays an important role in next generation wireless communication systems. Modified Brent-Luk-Van Loan array and other parallel hardware implementations were developed for channel matrix factorization. For a large matrix size as of massive MIMO, however, previous implementations would require a large amount of hardware resource. This paper presents a hardware-efficient architecture that performs singular value decomposition of a complex matrix in arbitrary size. Eveluated on an FPGA platform, the proposed architecture results faster or competitive processing time for matrix factorization but consumes significantly less hardware resource.

[1]  Taneli Riihonen,et al.  Optimized In-Band Full-Duplex MIMO Relay Under Single-Stream Transmission , 2016, IEEE Transactions on Vehicular Technology.

[2]  Franklin T. Luk,et al.  A Proof of Convergence for Two Parallel Jacobi SVD Algorithms , 1989, IEEE Trans. Computers.

[3]  Tricia J. Willink.  Efficient Adaptive SVD Algorithm for MIMO Applications , 2008, IEEE Transactions on Signal Processing.

[4]  Erik G. Larsson,et al.  Massive MIMO for next generation wireless systems , 2013, IEEE Communications Magazine.

[5]  Fredrik Tufvesson,et al.  Massive MIMO Performance Evaluation Based on Measured Propagation Data , 2014, IEEE Transactions on Wireless Communications.

[6]  Wolfgang Fichtner,et al.  Hardware-efficient steering matrix computation architecture for MIMO communication systems , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[7]  Chuan Tang,et al.  Channel Estimation in Massive MIMO: Algorithm and Hardware , 2015, NCCET.

[8]  Joseph R. Cavallaro,et al.  A systolic VLSI architecture for complex SVD , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[9]  O. Edfors,et al.  OFDM channel estimation by singular value decomposition , 1996, Proceedings of Vehicular Technology Conference - VTC.

[10]  Seyed Reza Zekavat,et al.  Real-Time Signal Processing of Massive Sensor Arrays via a Parallel Fast Converging SVD Algorithm: Latency, Throughput, and Resource Analysis , 2016, IEEE Sensors Journal.

[11]  Naveen Rathee.  A proposed efficient architecture for OFDM MIMO systems using SVD , 2012 .

[12]  An-Yeu Wu,et al.  Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems , 2012, IEEE Transactions on Signal Processing.

[13]  Mérouane Debbah,et al.  Massive MIMO: How many antennas do we need? , 2011, 2011 49th Annual Allerton Conference on Communication, Control, and Computing (Allerton).

[14]  Maurizio Valle,et al.  Assessment of FPGA Implementations of One Sided Jacobi Algorithm for Singular Value Decomposition , 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.