A high voltage switching circuit of a nonvolatile memory device and a nonvolatile memory device

The present invention relates to a high voltage switch circuit of a non-volatile memory device including a plurality of memory blocks, comprising a high voltage EMOS transistor, a logic circuit, and a high voltage switch circuit. The high voltage EMOS transistor delivers program voltage to a first memory block selected from the turn-on memory blocks in response to program turn-on voltage. The logic circuit generates a plurality of path selection signals in response to an enable signal which is activated when a program for the first memory block is operated; and a plurality of switching control signals which is based on either of an operation parameter of the non-volatile memory device or an access address for at least part of the first memory block. The high voltage switch circuit delivers the program turn-on voltage to a gate of the high voltage EMOS transistor through one among a plurality of delivery paths in response to the plurality of path selection signals; and disperses an effect of negative bias temperature instability (NBTI) due to the program turn-on voltage. The present invention can reduce performance degradation due to the NBTI.