Noise-Reducing Loop in Multi-bit Modulator

In a single-stage multi-bit modulator,the implementation of the multi- bit quantizer is often size and power consuming.When the bits of the quantizer i ncrease,the scale of the circuit increases exponentially and soon becomes practi cally impracticable.In this paper,a new architecture,Noise-Reducing Loop,is pro posed.It employs a quantizer with only a few bits and achieves much better perfo rmance that can only be achieved by using a huge quantizer in the conventional s tructure.Accompanied with the Dynamic Quantization algorithm,the modulator can t race the change of the input signal and achieve the near optimal performance ada ptively.