A simple chaos-generator for neuron element utilizing capacitance–npn-transistor pair
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Minoru Fujishima | Takahiro Irita | Koichiro Hoh | Tatsuo Tsujita | M. Fujishima | K. Hoh | T. Irita | T. Tsujita
[1] Thomas K. Miller,et al. A digital architecture employing stochasticism for the simulation of Hopfield neural nets , 1989 .
[2] K. Aihara,et al. Chaotic neural networks , 1990 .
[3] Yoh Yasuda,et al. Electronic Chaos in Silicon Thyristor , 1994 .
[4] Paolo Antognetti,et al. Semiconductor Device Modeling with Spice , 1988 .
[5] Minoru Fujishima,et al. Physical Mechanism of Chaos in Thyristors and Coupled-Transistor Structures , 1995 .