A 0.9 V offset compensated FGMOS comparator

A novel low voltage low power fully differential comparator based on the floating gate MOS (FGMOS) operation is presented in this paper. The FGMOS transistor is used to increase the input range and compensate for offset variations simultaneously. The comparator operates with a supply voltage of 0.9 V in a 0.35 /spl mu/m CMOS process. Its power consumption is less than 6.5 /spl mu/W for an 11 MHz clock frequency.