A self-regulating VCO with supply sensitivity of <0.15%-delay/1%-supply

A self-regulating VCO has supply sensitivity <0.15%-delay/1%-supply. The design uses a differential delay cell that contains an nMOS transmission gate for delay adjustment and a built-in feedback circuit for power-supply rejection. The charge-pump PLL embedded with this VCO has 40 ps peak-to-peak jitter at 450 MHz output with VCO at 900 MHz.