Conversion of binary to single-term triple base numbers for DSP applications

Non-binary number systems are increasingly gaining popularity in signal processing applications for their capabilities of handling arithmetic operations efficiently. One such number system, "Double Base Number System (DBNS)" has gained attention to many researchers for it's capability of performing multiplication operation efficiently. Recently, "Triple Base Number System (TBNS)" has been introduced which shows better performance over DBNS for higher bit operations in terms of speed, hardware complexity and power dissipation. However, the advantages of TBNS systems cannot be exploited due to substantial overhead of conversion from binary to TBNS. Keeping this issue in view, in this paper, a novel architecture has been proposed for high performance binary to TBNS conversion. Efficiency of this conversion scheme has been dealt with in details and experimental results and analysis clearly indicate the novelty of the architecture.

[1]  A. Sinha,et al.  Triple based number systems - a novel concept for performance enhancement of digital signal processors , 2008, TENCON 2008 - 2008 IEEE Region 10 Conference.

[2]  S. Maitra,et al.  A single digit triple base number system - a new concept for implementing high performance multiplier unit for DSP applications , 2007, 2007 6th International Conference on Information, Communications & Signal Processing.

[3]  Amitabha Sinha,et al.  A novel architecture for conversion of binary to single digit double base numbers , 2010, CARN.

[4]  Majid Ahmadi,et al.  A hybrid DBNS processor for DSP computation , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[5]  J.M.P. Langlois,et al.  Multipath greedy algorithm for canonical representation of numbers in the double base number system , 2005, The 3rd International IEEE-NEWCAS Conference, 2005..

[6]  Roberto Muscedere.  A Hardware Efficient Very Large Bit Word Binary to Double Base Number System Converter for Encryption Applications , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[7]  Reto Zimmermann.  Computer Arithmetic: Principles, Architectures, and VLSI Design , 1999 .

[8]  A. Paasio,et al.  Implementation alternatives of a DBNS adder , 2005, 2005 9th International Workshop on Cellular Neural Networks and Their Applications.

[9]  I-Ngo Chen,et al.  An algorithm for modular exponentiation , 1981, 1981 IEEE 5th Symposium on Computer Arithmetic (ARITH).

[10]  John P. Hayes,et al.  Computer Architecture and Organization , 1980 .

[11]  Graham A. Jullien,et al.  Near canonic double-based number system (DBNS) with applications in digital signal processing , 1996, Optics & Photonics.

[12]  Uwe Meyer-Baese.  Digital Signal Processing with Field Programmable Gate Arrays , 2001 .

[13]  T. H. Meyer.  Computer Architecture and Organization , 1982 .

[14]  Roberto Muscedere,et al.  Efficient techniques for binary-to-multidigit multidimensional logarithmic number system conversion using range-addressable look-up tables , 2005, IEEE Transactions on Computers.

[15]  Graham A. Jullien,et al.  Theory and applications for a double-base number system , 1997, Proceedings 13th IEEE Sympsoium on Computer Arithmetic.