Fast exact minimization of BDD's

We present a new exact algorithm for finding the optimal variable ordering for reduced ordered binary decision diagrams (BDD's). The algorithm makes use of a lower bound technique known from very large scale integration design. Up to now this technique has been used only for theoretical considerations and it is adapted here for this purpose. Furthermore, the algorithm supports symmetry aspects and uses a hashing based data structure. Experimental results are given to demonstrate the efficiency of our approach. We succeeded in minimizing several functions, including adders with up to 64 variables, for which all other previously presented approaches fail.

[1]  Luciano Lavagno,et al.  Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool , 1995, 32nd Design Automation Conference.

[2]  Bernd Becker,et al.  Synthesis for Testability: Binary Decision Diagrams , 1992, STACS.

[3]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[4]  Yasuhiko Sasaki,et al.  Top-down pass-transistor logic design , 1996, IEEE J. Solid State Circuits.

[5]  Hiroshi Sawada,et al.  Minimization of binary decision diagrams based on exchanges of variables , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[6]  Kurt Keutzer,et al.  Path-delay-fault testability properties of multiplexor-based networks , 1993, Integr..

[7]  Luca Benini,et al.  Decision Diagrams and Pass Transistor Logic Synthesis , 1997 .

[8]  Tae Sun Kim,et al.  An Efficient Method for Optimal BDD Ordering Computation , 1993 .

[9]  Kenneth J. Supowit,et al.  Finding the Optimal Variable Ordering for Binary Decision Diagrams , 1987, 24th ACM/IEEE Design Automation Conference.

[10]  A. Richard Newton,et al.  Logic synthesis for large pass transistor circuits , 1997, ICCAD 1997.

[11]  R. Drechsler,et al.  Symmetry Based Variable Ordering for ROBDDs , 1995 .

[12]  Fabio Somenzi,et al.  Symmetry detection and dynamic variable ordering of decision diagrams , 1994, ICCAD '94.

[13]  Randal E. Bryant,et al.  On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication , 1991, IEEE Trans. Computers.

[14]  Beate Bollig,et al.  Improving the Variable Ordering of OBDDs Is NP-Complete , 1996, IEEE Trans. Computers.