An LTL verification system based on automata theory

A tool for the design and veri cation of reactive systems has been developed at the University of Stellenbosch. On-they model checking is used to check correctness properties expressed in CTL (Computation Tree Logic). The system to be veri ed is modelled in a speci cation language called ESML. This thesis describes the implementation of an LTL (Linear Time Logic) model checker for ESML. The new model checker is based on automata theory, but uses the same state generator as the CTL model checker. The approach taken is to translate LTL formulas to B uchi automata before the model checking procedure. Veri cation proceeds by checking the emptiness of the product of the B uchi automaton and state graph generated from the ESML model. The algorithms needed to build the B uchi automaton from an LTL formula, the state generation strategy used in the model checker, and the algorithm to compute the product of the state graph and B uchi automaton are given. Evaluation of the new model checker involved testing and comparison against SPIN and the CTL model checker for ESML. Some e ciency issues are discussed.

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