A Comparative Analysis of two Verification Techniques for DEDS: Model Checking versus Model-based Testing
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[1] Shlomo Greenberg,et al. Evaluating and comparing simulation verification vs. formal verification approach on block level design , 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..
[2] Eliane Martins,et al. A Conformance Testing Process for Space Applications Software Services , 2006, J. Aerosp. Comput. Inf. Commun..
[3] Kwang-Ting Cheng,et al. A comparison of BDDs, BMC, and sequential SAT for model checking , 2003, Eighth IEEE International High-Level Design Validation and Test Workshop.
[4] Sofiène Tahar,et al. Formal Verification of Analog and Mixed Signal Designs: Survey and Comparison , 2006 .
[5] Jiang Chau Wang,et al. Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).
[6] William D. Young. Comparing Verification Systems: Interactive Consistency in ACL2 , 1997, IEEE Trans. Software Eng..
[7] Richard Lai,et al. A survey of communication protocol testing , 2002, J. Syst. Softw..
[8] F. Garcia,et al. Formal Verification of Safety and Liveness Properties for Logic Controllers. A Tool Comparison , 2006, 2006 3rd International Conference on Electrical and Electronics Engineering.
[9] Tobias Schüle,et al. Global vs. local model checking: a comparison of verification techniques for infinite state systems , 2004, Proceedings of the Second International Conference on Software Engineering and Formal Methods, 2004. SEFM 2004..
[10] Eliane Martins,et al. ConData: A Tool for Automating Specification-Based Test Case Generation for Communication Systems , 2004, Software Quality Journal.
[11] Marcel Verhoef,et al. Timed automata based analysis of embedded system architectures , 2006, IPDPS.