Simple and systematic design of FA cell using K map

A simple pass transistor approach using K map is proposed in this communication for design of combinational circuits. The approach is based on switching theory and requires mapping of logic functions into circuit realization using new pass transistor logic style. Low power and small area full adder cell is synthesized which utilized 14 transistors in CMOS implementation.

[1]  V.G. Oklobdzija,et al.  General method in synthesis of pass-transistor circuits , 2000, 2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400).

[2]  Vojin G. Oklobdzija,et al.  General method in synthesis of pass-transistor circuits , 2000 .

[3]  Yasuhiko Sasaki,et al.  Top-down pass-transistor logic design , 1996, IEEE J. Solid State Circuits.

[4]  Arunita Jaekel,et al.  Design of dynamic pass-transistor logic circuits using 123 decision diagrams , 1998 .

[5]  A. Richard Newton,et al.  Logic synthesis for large pass transistor circuits , 1997, ICCAD 1997.

[6]  Kazuo Taki,et al.  A survey for pass-transistor logic technologies-recent researches and developments and future prospects , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.