A completely integrated, low noise, low power CMOS frequency synthesizer for GSM communications

A low power 22-mW 900-MHz frequency synthesizer (FS), with an on-chip LCtuned voltage controlled oscillator (VCO) for GSM applications is presented. The synthesizer possesses several novel features that include a completely integrated structure, a low phase noise on-chip LC VCO, a low-power Dual-Modulus Divider (DMD) in CML topology, a compensated charge pump with balanced switching, an on-chip third order loop filter and a proposed relatively easy to implement fractional accumulator based frequency synthesis technique. The complete synthesizer achieves in-band phase noise characteristics better than -110 dBc/Hz at 100 kHz offset. The channel switching time is less than 500 /spl mu/s for a 25 MHz frequency hop. The synthesizer is able to accommodate all 195 transmit and receive channels in the R-GSM band. The proposed architecture has been realized using the 0.5 /spl mu/m AMI C5N technology. The complete integrated synthesizer occupies less than 1500 /spl times/ 700 /spl mu/m/sup 2/ of die real estate.