Digital signal processing at 1 GHz in a field-programmable object array

Autonomous MAC and ALU processors and register files (three types of silicon objects) are implemented with custom logic to achieve 1 GHz operation. Arraying hundreds of objects in parallel in a single chip enables high DSP performance from an in-circuit reprogrammable architecture. For example, a 1024-point radix-2 FFT with (16+16)-bit complex samples can be completed every 160 ns using 64 butterflies (128 MAC, 128 ALU, and 64 RF objects) assisted by 128 ALU and 64 RF objects for inter-stage data routing.