Capacitive Charge-Based Transmitter

In light of all the potential noise and efficiency benefits discussed in Chap. 2, the first proof-of-concept charge-based transmitter implementation [Par15b, Par15a] is presented in this chapter. As it will be noted in the following paragraphs, this first implementation closely resembles the proposed watermill analogy, where the amount of power transferred to an output load is controlled by either increasing or decreasing the water level in a reservoir. Instead of buckets and valves however, switches and capacitors are used in this case to deliver controllable amounts of charge to a baseband capacitor. The motivations for choosing this first topology are manifold: First, an architecture exclusively based on switches and capacitors is inherently “digital friendly”, in the sense that it can be easily scaled and ported to different technologies following the typically dominant digital circuitry. Second, switches and capacitors are perhaps the only two components that benefit from scaling in advanced digital-oriented CMOS technologies. By making smaller transistors the intrinsic capacitances are reduced, allowing faster switching with less power consumption [Raz12]. The feature size reduction also provides larger capacitance densities, improving area efficiency with metal-oxide-metal (MOM) integrated capacitors. Third, and not less important, as further discussed in Sect. 3.2.3.2 the given topology also provides quantization noise scaling capabilities, relaxing the out-of-band noise emission. This chapter is divided into other four sections. Section 3.2 provides the architecture description with operating principles, followed by circuit implementation (Sect. 3.3) and layout considerations. Measurement results and conclusions are given in Sects. 3.4 and 3.5 respectively.

[1]  Jan Craninckx,et al.  9.3 A transmitter with 10b 128MS/S incremental-charge-based DAC achieving −155dBc/Hz out-of-band noise , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[2]  Jan Craninckx,et al.  A multiband 40nm CMOS LTE SAW-less modulator with −60dBc C-IM3 , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[3]  Anne Van Den Bosch High resolution, high speed CMOS current-steering digital-to-analog converters , 2003 .

[4]  Xin He,et al.  A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[5]  Ahmad Mirzaei,et al.  Analysis of Imperfections on Performance of 4-Phase Passive-Mixer-Based High-Q Bandpass Filters in SAW-Less Receivers , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[6]  Xin He,et al.  A Low-Power, Low-EVM, SAW-Less WCDMA Transmitter Using Direct Quadrature Voltage Modulation , 2009, IEEE Journal of Solid-State Circuits.

[7]  Chao Yang,et al.  An LTE transmitter using a class-A/B power mixer , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[8]  Kenichi Okada,et al.  Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio , 2011 .

[9]  Robert Bogdan Staszewski,et al.  A Wideband 2$\times$ 13-bit All-Digital I/Q RF-DAC , 2014, IEEE Transactions on Microwave Theory and Techniques.

[10]  Aarno Pärssinen,et al.  A Multimode Transmitter in 0.13 $\mu\hbox{m}$ CMOS Using Direct-Digital RF Modulator , 2007, IEEE Journal of Solid-State Circuits.

[11]  Jan Craninckx,et al.  An Incremental-Charge-Based Digital Transmitter With Built-in Filtering , 2015, IEEE Journal of Solid-State Circuits.

[12]  Behzad Razavi,et al.  Design of Analog CMOS Integrated Circuits , 1999 .

[13]  Elias Dagher,et al.  Single-chip multiband WCDMA/HSDPA/HSUPA/EGPRS transceiver with diversity receiver and 3G DigRF interface without SAW filters in transmitter / 3G receiver paths , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[14]  Imran Bashir,et al.  A 0.8mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[15]  Ahmad Mirzaei,et al.  Analysis of Direct-Conversion IQ Transmitters With 25% Duty-Cycle Passive Mixers , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[16]  Chao Lu,et al.  A 24.7dBm all-digital RF transmitter for multimode broadband applications in 40nm CMOS , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.