The implementation of a fast Gaussian noise generator based on FPGA

In this paper, a new method of generating white Gaussian noise sequence in a single clock is proposed. To obtain the high throughput, we use an optimized implementation structure of the m-sequence on FPGA, and the mapping between uniform distribution and Gaussian distribution is realized based on non-uniform partition quantization method. The Gaussian sequence is filtered by FIR filter to meet the bandwidth limitation and then sent to D/A converter whose analog output is filtered by an analog filter. To adapt the special application environments, the power of the analog noise is adjusted according to the user input. The proposed method in this paper is simulated and implemented successfully, which verifies its validity.

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