A 3D DCT Architecture for Compression of Integral 3D Images

A new 3D DCT architecture for the computation of the three-dimensional discrete cosine transform(3D DCT)for compression of integral3D images is proposed.The architecture uses3N 2 /2multiplier and5N 2 /2+7N/2adder to evaluate N×N×N-point DCT and yields results at a rate of N point per cycle.In order to improve the efficiency of the system,the pipeline structure is used.The design of the3D DCT is modeled in RTL level by verilog HDL and simulated by Cadence verilog_XL.