Time Cheating in Divisible Load Scheduling: Sensitivity Analysis, Results and Open Problems

Abstract There is broad literature in relation to the Divisible Load Scheduling (DLS). The DLS is based on the fact that the computation and communication can be separated into some arbitrary independent parts, in which each part can be processed by an independent processor. The existing DLS models supposes that the processors report their true communication and computation rates to the root processor. It means the traditional DLS assumes that the processors do not cheat the root processor. In fact, in the real applications, the processors may cheat the algorithm it means the processors might not report their true computation or communication rates. However, the computation rate-cheating problem has been studied in several research. This paper reviews the research in relation to the communication and computation rate-cheating problems. The paper also investigates the sensitivity analysis of the DLS where the processors cheat the root processor for the first time.

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