Multilayer power delivery network design for high-speed microprocessor system

In this paper, an efticient modeling method for arbitrary shaped multi-layer power distribution network is proposed based on the method of transmission line grid model. In addition, a pre-layout design approach for the high-speed microprocessor is proposed. For arbitraly-shaped multi-layer PCB stack up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system.