New symmetric and planar designs of reversible full-adders/subtractors in quantum-dot cellular automata

Abstract Quantum-dot Cellular Automata (QCA) is one of the emerging nanotechnologies, promising an alternative to CMOS technology due to a faster speed, smaller size, lower power consumption, higher scale integration, and higher switching frequency. In addition, power dissipation is the main limitation of all the nanoelectronics design techniques including the QCA. Researchers have proposed various mechanisms to solve this problem. Among them, reversible computing is considered as a reliable solution to reduce the power dissipation. On the other hand, adders are fundamental circuits for most digital systems. So, in this paper, the focus is on designing of reversible full-adders in logical and layout levels. For this aim, the first, a method for converting irreversible functions to reversible ones is investigated. Based on it, two novel designs of reversible full-adders/subtractors are presented. In another section, a new five-input majority gate is introduced. By using of this gate, a new reversible full-adder is designed. Finally, the proposed structures are extended to design three new 8-bit reversible full-adder/subtractors. The results are indicative of the outperformance of the proposed designs in comparison with the best available ones in terms of area, complexity, delay, reversible/irreversible layout, and also in logic level in terms of garbage outputs, control inputs, number of majority and NOT gates. Graphical abstract

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