As discussed earlier a semiconductor device simulator is an accurate computer-aided design tool to investigate substrate coupling related behaviour in a mixed-signal environment, although to simulate circuits with more than a few transistors can require overly large amounts of computational time and resources. The use of such a simulator is useful in terms of studying the characteristics of coupling through the substrate in a given process and to obtain direction in terms of strategies to overcome it [4.3]. However, the amount of coupling is extremely layout dependent and can vary dramatically depending on the nature of the substrate biasing and guard ringing employed and also the distribution of the power supplies used to bias the substrate. Consequently, even though layout guidelines can be established and employed to reduce the coupling, it becomes necessary to verify real designs, ranging anywhere in size from a few transistors to hundreds of thousands of them in order to break the expensive cycle of design, layout and fabrication. Thus, mixed-signal designers require a tool that they can use in conjunction with a circuit simulator which will indicate to them signs, if any, of performance deterioration due to substrate noise. Not only does the tool need to be accurate, it must also be fast enough to allow them to use it as many times as is required to optimize a design to meet its performance specifications without sacrificing large amounts of design time.
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