Performance of OutputBuffered Banyan Networks with Arbitrary Buffer Sizes

This paper reports a queueing analysis and a simulation study of a switch fabric based on a buffered banyan structure whereby buffers are placed at the output links of each switching element. When buffers are located at the input links, it is well known that the maximum throughput is limited to approximately 0.45 under uniform input traffic pattern. This bottleneck is due to the head of the line (HOL) contention at each switching element and is intrinsic to input queueing. We propose a buffered banyan switch built from smaller knockout switches which are output-buffered switches. With small knockout switches as the basic switching elements, the complexity of the overall switch fabric is manageable and no internal clock speedup is required. Furthermore, it is shown that with the proposed output-buffered banyan switch, a maximum throughput of l can be achieved.