Analysis of finite-alphabet iterative decoders under processing errors

It is widely recognized that emerging hardware technologies will be inherently unreliable. In this paper, we study the performance of finite-alphabet iterative decoders when implemented on noisy hardware built out of unreliable components. We derive a recursive expression for the error probability in terms of both the transmission noise and processing errors. We allow different components of the decoding algorithm associated with certain computational units (i.e., bit and check nodes of varying degrees in the underlying graph) to be implemented using a collection of processors with varying levels of processing error rates. Performance analysis and optimal resource allocation of a noisy Gallager E decoder is presented as an application example of our general derivation. Simulations demonstrate that the implementation of a noisy iterative decoder according to the proposed analysis-guided optimal resource allocation outperforms implementations based on uninformed resource allocation under the common resource budget.

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