On-chip Timing Uncertainty Measurements on IBM Microprocessors
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William V. Huott | Phillip Restle | Joshua Friedrich | Robert L. Franch | R. Dixon | Steve Weitzel | James K. Norman | K. van Goor | G. Salem
[1] Gaurav Mittal,et al. Design of the Power6 Microprocessor , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[2] William V. Huott,et al. Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[3] C. Lichtenau,et al. A 64B CPU Pair: Dual- and Single-Processor Chips , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
[4] P.J. Restle,et al. Timing uncertainty measurements on the Power5 microprocessor , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[5] S. Asano,et al. The design and implementation of a first-generation CELL processor , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..