An Adaptive Bitrate Clock and Data Recovery Circuit for Communication Signal Analyzers

Many measurement instruments require an external timing reference to perform an accurate measurement. In equivalent-time oscilloscopes, for example, a trigger signal properly aligned to the data is essential, since they base their operation on a very accurate delay of the trigger, which is obtained by a clock and data recovery (CDR) circuit. In this paper, an adaptive bitrate CDR circuit for instrumentation applications is presented. It is designed in a standard 0.18-μm CMOS technology with a single supply voltage of 1.8 V and operates from 312.5 Mb/s to 2.5 Gb/s with a maximum power consumption of 140 mW and occupies an area of 1.5 mm × 0.6 mm.

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