Macromodeling a phase change memory (PCM) cell by HSPICE
暂无分享,去创建一个
[1] Haralampos Pozidis,et al. Programming algorithms for multilevel phase-change memory , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).
[2] S. Ovshinsky. Reversible Electrical Switching Phenomena in Disordered Structures , 1968 .
[3] X.Q. Wei,et al. HSPICE macromodel of PCRAM for binary and multilevel storage , 2006, IEEE Transactions on Electron Devices.
[4] Sung-Mo Kang,et al. A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs , 2009, IEICE Electron. Express.
[5] 陈小刚,et al. An SPICE Model for PCM Based on Arrhenius Equation , 2009 .
[6] D. Ielmini,et al. Recovery and Drift Dynamics of Resistance and Threshold Voltages in Phase-Change Memories , 2007, IEEE Transactions on Electron Devices.
[7] Li Xi,et al. An SPICE Model for PCM Based on Arrhenius Equation , 2009 .
[8] V. A. Pedroni,et al. Low-voltage high-speed Schmitt trigger and compact window comparator , 2005 .
[9] Hung-Chih Chang,et al. Improved SPICE macromodel of phase change random access memory , 2009, 2009 International Symposium on VLSI Design, Automation and Test.
[10] A. Pirovano,et al. A compact model for Phase Change Memories , 2006, 2006 International Conference on Simulation of Semiconductor Processes and Devices.
[11] Jin He,et al. Verilog-A model for phase change memory simulation , 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.
[12] Yi-Bo Liao,et al. Temperature-based phase change memory model for pulsing scheme assessment , 2008, 2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial.
[13] Yi-Bo Liao,et al. An Analytical Compact PCM Model Accounting for Partial Crystallization , 2007, 2007 IEEE Conference on Electron Devices and Solid-State Circuits.
[14] C.D. Wright,et al. Parameterized SPICE model for a phase-change RAM device , 2006, IEEE Transactions on Electron Devices.
[15] Pyung Choi,et al. Macromodeling with SPICE , 1992 .
[16] Zhitang Song,et al. A Compact Spice Model with Verilog-A for Phase Change Memory , 2011 .