Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance
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S.C. Rustagi | N. Balasubramanian | N. Singh | G. Lo | D. Kwong | N. Balasubramanian | S. Rustagi | C. Tung | L. Bera | K. Hoe | L.K. Bera | D.L. Kwong | N. Singh | C.H. Tung | G.Q. Lo | W.W. Fang | F.Y. Lim | A. Agarwal | K.M. Hoe | S.R. Omampuliyur | D. Tripathi | A.O. Adeyeye | W. Fang | S.R. Omampuliyur | A. Agarwal | D. Tripathi | A. Adeyeye | F. Y. Lim
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