A Single-chip Highly Efficient CMOS Class-E Power Amplifier for WLAN Applications

Abstract This paper presents a class-E, single-ended power amplifier (PA) for WLAN applications. This proposed circuit has a two-stage structure and adopts cascode class-E topology with self-biased technique that avoids using thick-oxide transistors and improves RF performance. The driver employing a current-reused technique can enhance the driving ability and power gain. Additionally, the efficiency is improved by inserting a series LC networks on drain node of switch transistor. The proposed PA is simulated by Advanced Design System (ADS) in TSMC 0.18-μ CMOS technology. With a 2.5-V power supply, the fully integrated CMOS PA achieves 21.5 dBm of maximum output power and 68.3% of power-added efficiency (PAE) at 2.4 GHz. It demonstrates a power gain of 45 dB and gives better output power at minimum input levels. The chip area including testing pads is 0.91 × 0.99 mm2.

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