New paradigm of silicon technology

We present a new paradigm of Si technologies to establish a gigahertz-operation gigascale integrated system large-scale integration (LSI), including digital and analog circuits. According to the theoretical analysis of high-speed signal propagation properties in the practical LSI structure, a gas-isolated-interconnect high-k gate dielectric metal-gate metal-substrate silicon-on-insulator (SOI) LSI structure is proposed as a possible solution for a future gigahertz GSI system LSI, where the clock rate is improved up to beyond 10 GHz and the minimum feature size is reduced down to 0.035 /spl mu/m in keeping with the continuous progress of the LSI's speed performance. Perfect scientific manufacturing free from fluctuations consisting of total low-temperature high-quality and high-speed processes based on very high-density plasma having very low electron temperatures is essential to realize them.

[1]  K. Saraswat,et al.  Dependence of Fermi level positions at gate and substrate on the reliability of ultrathin MOS gate oxides , 1999 .

[2]  T. Ohmi,et al.  Low-Temperature Formation of Silicon Nitride Film by Direct Nitridation Employing High-Density and Low-Energy Ion Bombardment , 1999 .

[3]  T. Ohmi ULSI reliability through ultraclean processing , 1993, Proc. IEEE.

[4]  Karen Holloway,et al.  Tantalum as a diffusion barrier between copper and silicon: Failure mechanism and effect of nitrogen additions , 1992 .

[5]  T. Ohmi,et al.  High-integrity ultra-thin silicon nitride film grown at low temperature for extending scaling limit of gate dielectric , 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

[6]  A. Bright,et al.  Low‐rate plasma oxidation of Si in a dilute oxygen/helium plasma for low‐temperature gate quality Si/SiO2 interfaces , 1991 .

[7]  Tadashi Shibata,et al.  Electrical Properties of Giant‐Grain Copper Thin Films Formed by a Low Kinetic Energy Particle Process , 1992 .

[8]  Tso-Ping Ma,et al.  Making silicon nitride film a viable gate dielectric , 1998 .

[9]  M. Bohr Interconnect scaling-the real limiter to high performance ULSI , 1995, Proceedings of International Electron Devices Meeting.

[10]  D. Hwang,et al.  Ultra-thin gate dielectrics: they break down, but do they fail? , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[11]  Daniel C. Edelstein,et al.  VLSI on-chip interconnection performance simulations and measurements , 1995, IBM J. Res. Dev..

[12]  T. Ohmi,et al.  Silicon Wafer Orientation Dependence of Metal Oxide Semiconductor Device Reliability , 1994 .

[13]  T. Ohmi,et al.  INFLUENCE OF FLUORINE IN BF2+ IMPLANTATION ON THE FORMATION OF ULTRASHALLOW AND LOW-LEAKAGE SILICON P+N JUNCTIONS BY 450-500 C ANNEALING , 1997 .

[14]  Y. Liu,et al.  Growth of ultrathin SiO2 on Si by surface irradiation with an O2+Ar electron cyclotron resonance microwave plasma at low temperatures , 1999 .

[15]  G. Goubau Surface Waves and Their Application to Transmission Lines , 1950 .

[17]  Keith W. Goossen,et al.  Modeling of picosecond pulse propagation in microstrip interconnections of integrated circuits , 1989 .

[18]  Initial stage of ultra-thin SiO2 formation at low temperatures using activated oxygen , 1997 .

[19]  T. Ohmi,et al.  Ion energy, ion flux, and ion species effects on crystallographic and electrical properties of sputter-deposited Ta thin films , 1997 .

[20]  H. Hasegawa,et al.  Properties of Microstrip Line on Si-SiO/sub 2/ System , 1971 .

[21]  Yasuaki Kawai,et al.  Ultra Low-Temperature Growth of High-Integrity Thin Gate Oxide Films by Low-Energy Ion-Assisted Oxidation , 1994 .

[22]  Tadahiro Ohmi,et al.  Current drive enhancement by using high-permittivity gate insulator in SOI MOSFET's and its limitation , 1996 .

[23]  T. Shibata,et al.  Reverse‐bias current reduction in low‐temperature‐annealed silicon pn junctions by ultraclean ion‐implantation technology , 1990 .

[24]  X. W. Wang,et al.  Highly Reliable Silicon Nitride Thin Films Made by Jet Vapor Deposition , 1995 .

[25]  Tadahiro Ohmi Trends for Future Silicon Technology , 1994 .

[26]  W. Lanford,et al.  Passivation of copper by silicide formation in dilute silane , 1992 .

[27]  James D. Meindl,et al.  Compact distributed RLC models for multilevel interconnect networks , 1999 .

[28]  T. Ohmi,et al.  Reliable tantalum gate fully-depleted-SOI MOSFETs with 0.15 /spl mu/m gate length by low-temperature processing below 500/spl deg/C , 1996, International Electron Devices Meeting. Technical Digest.

[29]  Tadahiro Ohmi,et al.  Tantalum-gate SOI MOSFET's featuring excellent threshold voltage control in low-power applications , 1995, 1995 IEEE International SOI Conference Proceedings.

[30]  T. Ohmi,et al.  Threshold voltage adjustment in SOI MOSFETs by employing tantalum for gate material , 1995, Proceedings of International Electron Devices Meeting.

[31]  S. Murarka,et al.  Stress effects in thermal cycling of copper (magnesium) thin films , 1995 .

[32]  Brian C. Wadell,et al.  Transmission Line Design Handbook , 1991 .

[33]  Tadahiro Ohmi,et al.  Tantalum-gate thin-film SOI nMOS and pMOS for low-power applications , 1997 .

[34]  T. Ohmi,et al.  Reduction of plasma-induced gate oxide damage using low-energy large-mass ion bombardment in gate-metal sputtering deposition , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

[35]  Takayasu Sakurai,et al.  Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs , 1993 .

[36]  Tadashi Shibata,et al.  Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions , 1995 .

[37]  Tadahiro Ohmi,et al.  Reliable tantalum-gate fully-depleted-SOI MOSFET technology featuring low-temperature processing , 1997 .

[38]  M. Hirayama,et al.  Low-temperature growth of high-integrity silicon oxide films by oxygen radical generated in high-density krypton plasma , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[39]  X. W. Wang,et al.  Highly Reliable Silicon Nitride Films Made by Jet Vapor Deposition , 1994 .

[40]  Tadahiro Ohmi,et al.  Excellent electro/stress-migration-resistance surface-silicide passivated giant-grain Cu-Mg alloy interconnect technology for giga scale integration (GSI) , 1995, Proceedings of International Electron Devices Meeting.

[41]  T. P. Ma,et al.  Highly robust ultra-thin gate dielectric for giga scale technology , 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

[42]  Takao Yonehara,et al.  Epitaxial layer transfer by bond and etch back of porous Si , 1994 .

[43]  Tadahiro Ohmi,et al.  Design of Radial Line Slot Antennas at 8.3 GHz for Large Area Uniform Plasma Generation , 1999 .

[44]  Woojin Jin,et al.  Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits (Special Issue on TCAD for Semiconductor Industries) , 1999 .