Algorithmic fault tolerance for matrix operations on triangular arrays
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[1] Renato Stefanelli,et al. Reconfigurable architectures for VLSI processing arrays , 1986 .
[2] H. T. Kung,et al. Wafer-scale integration and two-level pipelined implementations of systolic arrays , 1984, J. Parallel Distributed Comput..
[3] D.K. Pradhan,et al. Yield and performance enhancement through redundancy in VLSI and WSI multiprocessor systems , 1986, Proceedings of the IEEE.
[4] Graham M. Megson,et al. Matrix inversion by systolic rank annihilation , 1987 .
[5] Charles E. Leiserson,et al. Area-Efficient VLSI Computation , 1983 .
[6] Graham M. Megson. Novel algorithms for the soft-systolic paradigm , 1987 .
[7] Graham M. Megson,et al. Triangular systolic arrays for matrix product and factorisation , 1988 .
[8] Franklin T. Luk,et al. An Analysis of Algorithm-Based Fault Tolerance Techniques , 1988, J. Parallel Distributed Comput..
[9] Jacob A. Abraham,et al. Algorithm-Based Fault Tolerance for Matrix Operations , 1984, IEEE Transactions on Computers.
[10] J.A. Abraham,et al. Fault-tolerant matrix arithmetic and signal processing on highly concurrent computing structures , 1986, Proceedings of the IEEE.