Experimental Analysis of Different Techniques for Bounded Model Checking

Bounded model checking (BMC) is a procedure that searches for counterexamples to a given property through bounded executions of a non-terminating system. This paper compares the performance of SAT-based, BDD-based and explicit state based BMC on benchmarks drawn from commercial designs. Our experimental framework provides a uniform and comprehensive basis to evaluate each of these approaches. The experimental results in this paper suggest that for designs with deep counterexamples, BDD-based BMC is much faster. For designs with shallow counterexamples, we observe that indeed SAT-based BMC is more effective than BDD-based BMC, but we also observe that explicit state based BMC is comparably effective, a new observation.

[1]  Mary Sheeran,et al.  A Tutorial on Stålmarcks's Proof Procedure for Propositional Logic , 1998, FMCAD.

[2]  Armin Biere,et al.  Symbolic Model Checking without BDDs , 1999, TACAS.

[3]  Robert P. Kurshan,et al.  Software for analytical development of communications protocols , 1990, AT&T Technical Journal.

[4]  Koen Claessen,et al.  SAT-Based Verification without State Space Traversal , 2000, FMCAD.

[5]  Kenneth L. McMillan,et al.  Symbolic model checking , 1992 .

[6]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[7]  J. P. Marques,et al.  GRASP : A Search Algorithm for Propositional Satisfiability , 1999 .

[8]  Joseph Sifakis,et al.  Specification and verification of concurrent systems in CESAR , 1982, Symposium on Programming.

[9]  G. Cabodi,et al.  Can BDDs compete with SAT solvers on Bounded Model Checking? , 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

[10]  Kenneth L. McMillan,et al.  Symbolic model checking: an approach to the state explosion problem , 1992 .

[11]  Matthew W. Moskewicz,et al.  Cha : Engineering an e cient SAT solver , 2001, DAC 2001.

[12]  Sharad Malik,et al.  Chaff: engineering an efficient SAT solver , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[13]  A. Kuehlmann,et al.  Equivalence Checking Using Cuts And Heaps , 1997, Proceedings of the 34th Design Automation Conference.

[14]  E. Clarke,et al.  Verifying Safety Properties of a PowerPC TM 1 Microprocessor Using Symbolic Model Checking without BDDs , 1999 .

[15]  Ofer Shtrichman.  Tuning SAT Checkers for Bounded Model Checking , 2000, CAV 2000.

[16]  Armando Tacchella,et al.  Benefits of Bounded Model Checking at an Industrial Setting , 2001, CAV.

[17]  Edmund M. Clarke,et al.  Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..

[18]  Randal E. Bryant,et al.  Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW , 2001, DAC '01.

[19]  Edmund M. Clarke,et al.  Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic , 1981, Logic of Programs.

[20]  Arne Borälv,et al.  The Industrial Success of Verification Tools Based on Stålmarck's Method , 1997, CAV.

[21]  Per Bjesse,et al.  Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers , 2001, CAV.

[22]  Hantao Zhang,et al.  SATO: An Efficient Propositional Prover , 1997, CADE.

[23]  Rajeev Alur,et al.  A Temporal Logic of Nested Calls and Returns , 2004, TACAS.

[24]  Mary Sheeran,et al.  A Tutorial on Stålmarck's Proof Procedure for Propositional Logic , 2000, Formal Methods Syst. Des..

[25]  Eugene Goldberg,et al.  BerkMin: A Fast and Robust Sat-Solver , 2002 .

[26]  R. Bryant.  Graph-Based Algorithms for Boolean Function Manipulation12 , 1986 .

[27]  Daniel Kroening,et al.  Efficient Computation of Recurrence Diameters , 2003, VMCAI.