Fast algorithm for leakage power reduction by input vector control

With leakage power being no longer negligible, it becomes a critical problem for low power design. Input vector control is an effective method to reduce leakage power when a circuit enters sleep mode. It seeks to find a vector that minimizes leakage power to be statically applied to the primary inputs of a circuit. In this paper, we present a fast algorithm to search the input vector which can lead to the minimal leakage power. In order to accelerate the evaluation procedure, the circuit under simulation is reduced by circuit partition based on the level number of circuits first. Then, a searching algorithm based on sub-circuit is used to find the target input vector. Experimental results on combinational circuits of ISCAS85 benchmark show this algorithm can accelerate calculation over 5 times.

[1]  Kaushik Roy,et al.  Low-Power CMOS VLSI Circuit Design , 2000 .

[2]  Farid N. Najm,et al.  A gate-level leakage power reduction method for ultra-low-power CMOS circuits , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[3]  David Blaauw,et al.  Robust SAT-Based Search Algorithm for Leakage Power Reduction , 2002, PATMOS.

[4]  Mark C. Johnson,et al.  Leakage control with efficient use of transistor stacks in single threshold CMOS , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

[5]  Farid N. Najm,et al.  Transition density, a stochastic measure of activity in digital circuits , 1991, 28th ACM/IEEE Design Automation Conference.

[6]  L. H. Goldstein,et al.  Controllability/observability analysis of digital circuits , 1978 .

[7]  James Kao,et al.  Subthreshold leakage modeling and reduction techniques , 2002, ICCAD 2002.

[8]  Ibrahim N. Hajj,et al.  Maximum leakage power estimation for CMOS circuits , 1999, Proceedings IEEE Alessandro Volta Memorial Workshop on Low-Power Design.

[9]  Zhanping Chen,et al.  Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).