X-Point PUF: Exploiting Sneak Paths for a Strong Physical Unclonable Function Design

This paper presents a design of strong physical unclonable function (PUF) exploiting the sneak paths in the resistive X-point array. The entanglement of the sneak paths in the X-point array greatly enhances the entropy of the physical system, thereby increasing the space of challenge-response pairs. To eliminate the undesired collision or diffuseness in X-point PUF with “analog” resistance distribution and “digital” resistance distribution is employed in this paper. The effect of design parameters and non-ideal properties in X-point array on the performance of X-point PUF is systematically investigated by Simulation Program with Integrated Circuit Emphasis (SPICE) simulation. The simulation results show that—1) the PUF’s performance presents strong dependence on the percent of cells in the on-state, thus should be carefully optimized for the robustness against the reference current variation of the sense amplifier; 2) the interconnect resistance decreases the column current thus the reference current should scale down with the scaling of technology node; 3) larger on/off ratio is desired to achieve low power consumption and high robustness against reference current variation; and 4) the device-to-device variation might degrade the performance of X-point PUF, which can be mitigated with write-verify programming scheme in the PUF construction phase. In addition, the proposed X-point PUF presents no correlation between challenges and responses, and strong security against the possible SPICE modeling attack and machine learning attack. Compared with the conventional Arbiter PUF, the X-point PUF has benefits in smaller area, lower energy, and enhanced security.

[1]  Shimeng Yu,et al.  Metal–Oxide RRAM , 2012, Proceedings of the IEEE.

[2]  M. Kozicki,et al.  Electrochemical metallization memories—fundamentals, applications, prospects , 2011, Nanotechnology.

[3]  Miodrag Potkonjak,et al.  Nano-PPUF: A Memristor-Based Security Primitive , 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

[4]  Sanjukta Bhanja,et al.  MRAM PUF: A Novel Geometry Based Magnetic PUF With Integrated CMOS , 2015, IEEE Transactions on Nanotechnology.

[5]  Shimeng Yu,et al.  Design and optimization of a strong PUF exploiting sneak paths in resistive cross-point array , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

[6]  Shimeng Yu,et al.  A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation , 2016, 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

[7]  Ligang Gao,et al.  Physical Unclonable Function Exploiting Sneak Paths in Resistive Cross-point Array , 2016, IEEE Transactions on Electron Devices.

[8]  Meng-Fan Chang,et al.  A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[9]  L. Goux,et al.  Improvement of data retention in HfO2/Hf 1T1R RRAM cell under low operating current , 2013, 2013 IEEE International Electron Devices Meeting.

[10]  An Chen,et al.  Utilizing the Variability of Resistive Random Access Memory to Implement Reconfigurable Physical Unclonable Functions , 2015, IEEE Electron Device Letters.

[11]  Shimeng Yu,et al.  Experimental Characterization of Physical Unclonable Function Based on 1 kb Resistive Random Access Memory Arrays , 2015, IEEE Electron Device Letters.

[12]  Derek Abbott,et al.  Memristive crypto primitive for building highly secure physical unclonable functions , 2015, Scientific Reports.

[13]  Pim Tuyls,et al.  Hardware Intrinsic Security to Protect Value in the Mobile Market , 2014, ISSE.

[14]  Ulrich Rührmair,et al.  PUFs at a glance , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[15]  Miodrag Potkonjak,et al.  Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications , 2015, Proceedings of the IEEE.

[16]  G. Edward Suh,et al.  Physical Unclonable Functions for Device Authentication and Secret Key Generation , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[17]  Srinivas Devadas,et al.  PUF Modeling Attacks on Simulated and Silicon Data , 2013, IEEE Transactions on Information Forensics and Security.

[18]  Chaitali Chakrabarti,et al.  Exploiting resistive cross-point array for compact design of physical unclonable function , 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

[19]  Jean-Pierre Seifert,et al.  Cloning Physically Unclonable Functions , 2013, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[20]  Srinivas Devadas,et al.  Physical Unclonable Functions and Applications: A Tutorial , 2014, Proceedings of the IEEE.

[21]  B. DeSalvo,et al.  Microscopic understanding of the low resistance state retention in HfO2 and HfAlO based RRAM , 2014, 2014 IEEE International Electron Devices Meeting.

[22]  Shimeng Yu,et al.  Emerging Memory Technologies: Recent Trends and Prospects , 2016, IEEE Solid-State Circuits Magazine.

[23]  Ramesh Karri,et al.  A Primer on Hardware Security: Models, Methods, and Metrics , 2014, Proceedings of the IEEE.

[24]  James F. Plusquellic,et al.  A non-volatile memory based physically unclonable function without helper data , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[25]  Chip-Hong Chang,et al.  Exploiting Process Variations and Programming Sensitivity of Phase Change Memory for Reconfigurable Physical Unclonable Functions , 2014, IEEE Transactions on Information Forensics and Security.

[26]  Jorge Guajardo,et al.  FPGA Intrinsic PUFs and Their Use for IP Protection , 2007, CHES.