Compositional reactive semantics of system-level designs written in SystemC and formal verification with predicate abstraction

In this paper, we propose a method to automatically extract an abstract representation of SystemC components into the SystemC-waiting state automata: a compositional formal model for verifying properties of SystemC at the transaction level within a delta-cycle. The main drawback of this model as mentioned in previous works was that it should be provided manually. In this paper, we propose a method to automatically build the SystemC waiting-state automata from the SystemC code. First, we select a subset of SystemC language and define its operational semantics that succinctly captures its reactive features and allows the specification of synchronous and asynchronous communications between the communicating components. Next, we symbolically execute the SystemC code using these semantics to generate the set of all possible traces and finally we use predicate abstraction to reduce the complexity of the generated graph during symbolic execution. We illustrate the use of symbolic execution and then predicate abstraction for two examples of SystemC programs: one that handles execution traces without loops and another one that handles loops.