A wear-leveling algorithm exploiting k-bitwise operations for flash storage devices

Flash storage devices are widely used for mobile consumer electronics due to small size, low power consumption, and high performance. Generally, the flash storage device consists of NAND flash memories. Compared to traditional magnetic disks, NAND flash memory requires an additional erase operation and its blocks have limited erase cycles. For extending its endurance, various wear-leveling algorithms have been proposed. However, they invoke many read/write/erase operations and use many memory resources for managing their block states because they do not consider the property of the flash translation layer. To solve these problems, a new wear-leveling algorithm for the log-based flash translation layer is proposed in this paper. In the log-based flash translation layer, since log blocks are frequently updated and erased, the cold block rarely removed is reserved for a next log block so that all the blocks are evenly erased. In addition, the proposed algorithm reduces the usage of memory resources by exploiting k-bitwise erase table that only needs small k-bit erase flags for managing its block erase state. Through various experiments with related wear-leveling algorithms, this paper shows the superiority of the proposed wear-leveling algorithm.

[1]  Samuel H. Russ,et al.  Simulation-based optimization of wear leveling for solid-state disk digital video recording , 2014, IEEE Transactions on Consumer Electronics.

[2]  Rino Micheloni,et al.  Inside Solid State Drives (Ssds) , 2012 .

[3]  Guangxia Xu,et al.  Swap-aware garbage collection algorithm for NAND flash-based consumer electronics , 2014, IEEE Transactions on Consumer Electronics.

[4]  Guoliang Li,et al.  A survey of address translation technologies for flash memories , 2014, CSUR.

[5]  Qiang Liu,et al.  A Group-Based Hybrid Wear-Leveling Algorithm for Flash Memory Storage Systems , 2012, 2012 Third International Conference on Digital Manufacturing & Automation.

[6]  Tae-Sun Chung,et al.  A Tri-Pool Dynamic Wear-Leveling Algorithm for Large Scale Flash Memory Storage Systems , 2011, 2011 International Conference on Information Science and Applications.

[7]  Li-Pin Chang,et al.  Design and implementation of an efficient wear-leveling algorithm for solid-state-disk microcontrollers , 2009, TODE.

[8]  Sang-Won Lee,et al.  A log buffer-based flash translation layer using fully-associative sector translation , 2007, TECS.

[9]  Sang Lyul Min,et al.  A space-efficient flash translation layer for CompactFlash systems , 2002, IEEE Trans. Consumer Electron..

[10]  Dong-Ho Lee,et al.  HFTL: hybrid flash translation layer based on hot data identification for flash memory , 2009, IEEE Transactions on Consumer Electronics.

[11]  Tei-Wei Kuo,et al.  Improving Flash Wear-Leveling by Proactively Moving Static Data , 2010, IEEE Transactions on Computers.

[12]  Guangxia Xu,et al.  Garbage collection policy to improve durability for flash memory , 2012, IEEE Transactions on Consumer Electronics.

[13]  Sang-Won Lee,et al.  A survey of Flash Translation Layer , 2009, J. Syst. Archit..

[14]  Hiroshi Motoda,et al.  A Flash-Memory Based File System , 1995, USENIX.

[15]  Sivan Toledo,et al.  Algorithms and data structures for flash memories , 2005, CSUR.

[16]  Young-Jin Kim,et al.  LAST: locality-aware sector translation for NAND flash memory-based storage systems , 2008, OPSR.

[17]  Hua Yan,et al.  An efficient file-aware garbage collection algorithm for NAND flash-based consumer electronics , 2014, IEEE Transactions on Consumer Electronics.