Mismatch sensitivity of a simultaneously latched CMOS sense amplifier

The authors introduce a new formula for the sensitivity of a vertically matched CMOS sense amplifier, of the type used in dynamic RAMs (DRAMs) to threshold voltage mismatch, parasitic capacitance mismatch, transconductance mismatch, and bitline load capacitance mismatch. The perturbation approach is rigorous; it avoids most approximations and ad hoc assumptions, and it introduces no free constants to be determined from simulations. The perturbation approach yields an explicit closed-form solution. The formula agrees well with simulations. It is inherently slightly conservative and thus appropriate for use in design.<<ETX>>