论文信息 - A novel design and implementation of multi-valued logic arithmetic full adder circuit using CNTFET

A novel design and implementation of multi-valued logic arithmetic full adder circuit using CNTFET

A novel Full Adder circuit based on ternary logic and designed using carbon nanotube technology is presented in the paper. The types of CNTFETs along with their working are reviewed in detail. CNTFETs, with different threshold voltages, can be used to implement logic systems higher than binary, like ternary logic system. Starting with the standard ternary inverter, logic circuits like ternary NOR and ternary NAND are implemented. A new architecture of Ternary Full Adder is proposed in CNTFET with 7nm technology along with its working waveform and performance analysis. SPICE simulations are carried out for the design and results are analyzed. The proposed Ternary Full Adder, on comparison with the existing adders, displayed better performance and lower power characteristics thus making it is apt for low-power high-performance applications.

L. S. Phanindra | M. N. Rajath | V. Rakesh | K. S. Vasundara Patel

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