Hardware Metering: A Survey

This chapter provides the first comprehensive overview of hardware integrated circuits (IC) protection by metering. Hardware metering, or IC metering refers to mechanisms, methods, and protocols that enable tracking of the ICs postfabrication. Metering is particularly needed in the horizontal semiconductor business model where the design houses outsource their fabrication to (mostly offshore) contract foundries to mitigate the manufacturing and labor costs. The designers and/or the design intellectual property (IP) holders are vulnerable to piracy and overbuilding attacks due to the transparency of their designed IP to the foundry that requires a complete description of the design components and layout to fabricate the chips. Because of the prevalence of counterfeit and overbuilt items, and the widespread usage of ICs in a variety of important applications, the problem has recently gained an increased attention by the industry, government, and research community. Post-silicon identification and tagging of the individual ICs fabricated by the same mask is a precursor for metering: In passive metering, each ICs is specifically identified, either in terms of its functionality or by other forms of unique identification. The identified ICs may be matched against their record in a preformed database that could reveal unregistered ICs or overbuilt ICs (in case of collisions). In active metering, not only the ICs are uniquely identified but also parts of the chip’s functionality can be only accessed, locked (disabled), or unclocked (enabled) by the designer and/or IP rights owners with a high level knowledge of the design that is not transferred to the foundry. We provide a systematic view of the field, along with the first detailed taxonomy and descriptions of the various passive and active hardware metering methods available.

[1]  Jarrod A. Roy,et al.  Protecting bus-based hardware IP by secret sharing , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[2]  Daniel E. Holcomb,et al.  Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers , 2009, IEEE Transactions on Computers.

[3]  Miodrag Potkonjak,et al.  Signature hiding techniques for FPGA intellectual property protection , 1998, ICCAD '98.

[4]  Ingrid Verbauwhede,et al.  Analysis and design of active IC metering schemes , 2009, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust.

[5]  C. Mouli,et al.  Future Fab , 2007, IEEE Spectrum.

[6]  Miodrag Potkonjak,et al.  Behavioral synthesis techniques for intellectual property protection , 2005, TODE.

[7]  Farinaz Koushanfar,et al.  Active control and digital rights management of integrated circuit IP cores , 2008, CASES '08.

[8]  Jarrod A. Roy,et al.  Ending Piracy of Integrated Circuits , 2010, Computer.

[9]  Edoardo Charbon,et al.  Watermarking-based copyright protection of sequential functions , 1999 .

[10]  Miodrag Potkonjak,et al.  Intellectual Property Metering , 2001, Information Hiding.

[11]  Arlindo L. Oliveira Techniques for the creation of digital watermarks in sequentialcircuit designs , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Dhruva Acharyya,et al.  A physical unclonable function defined using power distribution system equivalent resistance variations , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[13]  Gang Qu,et al.  Information Hiding in Finite State Machine , 2004, Information Hiding.

[14]  Farinaz Koushanfar,et al.  Provably Secure Active IC Metering Techniques for Piracy Avoidance and Digital Rights Management , 2012, IEEE Transactions on Information Forensics and Security.

[15]  Miodrag Potkonjak,et al.  Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach , 2008, Information Hiding.

[16]  Dhruva Acharyya,et al.  Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system , 2010, Design Automation Conference.

[17]  Miodrag Potkonjak,et al.  Hardware Trojan horse detection using gate-level characterization , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[18]  Swarup Bhunia,et al.  Hardware protection and authentication through netlist level obfuscation , 2008, ICCAD 2008.

[19]  W. R. Daasch,et al.  IC identification circuit using device mismatch , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[20]  Miodrag Potkonjak,et al.  Gate-level characterization: Foundations and hardware security applications , 2010, Design Automation Conference.

[21]  Brian Santo Plans for Next-Gen Chips Imperiled , 2007, IEEE Spectrum.

[22]  Amit Sahai,et al.  On the (im)possibility of obfuscating programs , 2001, JACM.

[23]  Miodrag Potkonjak,et al.  SVD-Based Ghost Circuitry Detection , 2009, Information Hiding.

[24]  Farinaz Koushanfar,et al.  Consistency-based characterization for IC Trojan detection , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[25]  Farinaz Koushanfar,et al.  Post-silicon timing characterization by compressed sensing , 2008, ICCAD 2008.

[26]  Farinaz Koushanfar,et al.  Noninvasive leakage power tomography of integrated circuits by compressive sensing , 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

[27]  Jarrod A. Roy,et al.  EPIC: Ending Piracy of Integrated Circuits , 2008, 2008 Design, Automation and Test in Europe.

[28]  Farinaz Koushanfar,et al.  A Unified Framework for Multimodal Submodular Integrated Circuits Trojan Detection , 2011, IEEE Transactions on Information Forensics and Security.

[29]  Miodrag Potkonjak,et al.  Remote activation of ICs for piracy prevention and digital right management , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[30]  John Lach,et al.  IC activation and user authentication for security-sensitive systems , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[31]  Farinaz Koushanfar,et al.  Active Hardware Metering for Intellectual Property Protection and Security , 2007, USENIX Security Symposium.

[32]  Gang Qu,et al.  Hardware metering , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[33]  Srinivas Devadas,et al.  Silicon physical random functions , 2002, CCS '02.

[34]  Miodrag Potkonjak,et al.  Localized watermarking: methodology and application to operation scheduling , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[35]  Joseph Zambreno,et al.  Preventing IC Piracy Using Reconfigurable Logic Barriers , 2010, IEEE Design & Test of Computers.

[36]  Farinaz Koushanfar,et al.  A Unified Submodular Framework for Multimodal IC Trojan Detection , 2010, Information Hiding.

[37]  Farinaz Koushanfar,et al.  Provably secure obfuscation of diverse watermarks for sequential circuits , 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[38]  Farinaz Koushanfar,et al.  Integrated circuits metering for piracy protection and digital rights management: an overview , 2011, GLSVLSI '11.