Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design

Circuit reliability issues such as bias temperature instability, hot carrier injection, time-dependent dielectric breakdown, electromigration, and random telegraph noise have become a growing concern with technology scaling. Precise measurements of circuit degradation induced by these reliability mechanisms are a key aspect of robust design. This article reviews several unique test-chip designs that demonstrate the benefits of utilizing on-chip logic and a simple test interface to automate circuit aging experiments. This new class of compact on-chip sensors can reveal important aspects of circuit aging that would otherwise be impossible to measure, facilitate the collection of reliability data from systems deployed in the field, and eventually lead us down the path to real-time aging compensation in future processors.

[1]  S. Rauch The statistics of NBTI-induced V/sub T/ and /spl beta/ mismatch shifts in pMOSFETs , 2002 .

[2]  C. Kim,et al.  RTN induced frequency shift measurements using a ring oscillator based circuit , 2013, 2013 Symposium on VLSI Technology.

[3]  Xiaofei Wang,et al.  Duty-cycle shift under asymmetric BTI aging: A simple characterization method and its application to SRAM timing , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

[4]  Josep Torrellas,et al.  The BubbleWrap many-core: Popping cores for sequential acceleration , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[5]  S. Krishnan,et al.  SRAM Cell Static Noise Margin and VMIN Sensitivity to Transistor Degradation , 2006, 2006 International Electron Devices Meeting.

[6]  Xiaofei Wang,et al.  On-chip reliability monitors for measuring circuit degradation , 2010, Microelectron. Reliab..

[7]  David Blaauw,et al.  Early detection of oxide breakdown through in situ degradation sensing , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[8]  John Keane,et al.  An All-In-One Silicon Odometer for Separately Monitoring HCI, BTI, and TDDB , 2010, IEEE Journal of Solid-State Circuits.

[9]  P. Jain,et al.  Impact of interconnect length on BTI and HCI induced frequency degradation , 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

[10]  John Keane,et al.  An Array-Based Odometer System for Statistically Significant Circuit Aging Characterization , 2011, IEEE Journal of Solid-State Circuits.

[11]  C.H. Kim,et al.  Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits , 2007, 2007 IEEE Symposium on VLSI Circuits.

[12]  Pong-Fei Lu,et al.  A built-in BTI monitor for long-term data collection in IBM microprocessors , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

[13]  Xiaofei Wang,et al.  A 32nm SRAM reliability macro for recovery free evaluation of NBTI and PBTI , 2012, 2012 International Electron Devices Meeting.

[14]  K. Takeuchi,et al.  Direct observation of RTN-induced SRAM failure by accelerated testing and its application to product reliability assessment , 2010, 2010 Symposium on VLSI Technology.