Performance of the SPACIROC front-end ASIC for JEM-EUSO

SPACIROC (Spatial Photomultiplier Array Counting and Integrating ReadOut Chip) is a frontend (FE) ASIC designed for the space-borne fluorescence telescope JEM-EUSO (Extreme Universe Space Observatory on board Japanese Experiment Module). This device performs single photon counting in a dynamic range of 1 photoelectron (PE) to 300 PEs/pixel/2.5 μs, with double pulse resolution of 30 ns, and low power consumption (<1 mW/ch). Input photons are measured with two modes: Photon Counting (PC) mode and Charge-to-Time conversion, so called KI, mode for the multiplexed channels. Combination of these two features enables the large dynamic range as described above. After successful testing phase of the first prototype of SPACIROC (SPACIROC1), the second prototype (SPACIROC2) was developed and tested since May 2012. The main improvements are the following: lower power consumption due to better power management, enhancement in Photon Counting time resolution and extension of the KI maximum input rate. SPACIROC1 chips were integrated into the front-end electronics (FEE) of an instrument pathfinder for detecting gamma ray bursts the Ultra Fast Flash Observatory (UFFO) which is foreseen to be launched in 2013. Towards the end of 2012, the FE board designed around SPACIROC1 chips have been fabricated for the EUSO-BALLOON [5] [6] and TAEUSO [7] projects. We report here on the performance of SPACIROC1 and SPACIROC2 such as single photon counting ability, double pulse resolution, dynamic range, linearity and power consumption.