Design and Implementation of an Accurate 3-Bit System-on-Chip (SoC) Flash ADC for Aerospace Application in 90 nm CMOS Technology

Flash ADC is one of the fastest methods for analog to digital conversion. In the current project work, an accurate and improved low power flash ADC (analog to digital converter) has been designed for aerospace applications. The flash ADC has worked well with the consumption of low power and shows high accuracy in the system on chip (SoC) temperature sensor where we feed the analog output from the temperature sensor unit to the analog to digital converter. Process corner analysis has been performed to check for the robustness of the design. A power supply is +1 to 0 V in the proposed design. The proposed design is better than previously designed ADCs in terms of power consumption, error and performance. Analysis for non-linearity (DNL and INL) has been done and graphs have been plotted for the same. The design and simulation have been tested with the help of Cadence Analog Design environment with UMC 90 nm CMOS process technology.

[1]  Silpakesav Velagaleti,et al.  A Novel High Speed Dynamic Comparator Using Positive Feedback with Low Power Dissipation and Low Offset , 2010, ICT.

[2]  Mamun Bin Ibne Reaz,et al.  An Improved A Low Power CMOS TIQ Comparator Flash ADC , 2014 .

[3]  Hazrat Patil,et al.  Low power dynamic comparator for 4 — bit Flash ADC , 2016, 2016 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC).

[4]  Kumar Y. B. Nithin,et al.  Design of Low Power 5-Bit Hybrid Flash ADC , 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

[5]  Anubhav Sahu,et al.  Design and Evaluation of Flash ADC , 2015, IEEE Transactions on Applied Superconductivity.

[6]  M. Kiranmai,et al.  Cmos Full Adder and Multiplexer Based Encoder for Low Resolution Flash Adc , 2017 .

[7]  Kamalakanta Mahapatra,et al.  A Low Power Reconfigurable Encoder for Flash ADCs , 2016 .

[8]  François R. Boyer,et al.  Design of low power 4-bit flash ADC based on standard cells , 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

[9]  Sreehari Veeramachaneni,et al.  Design of a Low Power, Variable-Resolution Flash ADC , 2009, 2009 22nd International Conference on VLSI Design.

[10]  Reza Lotfi,et al.  Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[11]  Kyusun Choi,et al.  A tiq-based cmos flash a/d converter for system-on-chip applications , 2003 .

[12]  Thottempudi Pardhu,et al.  A low power flash ADC with Wallace tree encoder , 2014, 2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN).

[13]  Silpakesav Velagaleti.  A Novel High Speed Dynamic Comparator with Low Power Dissipation and Low Offset , 2009 .